The Raspberry Pi has released two new specs for PCIe FFC connectorboth for wiring and for new standards for HAT+ or HAT Plus. In this way, hardware or accessories can be developed for the Raspberry Pi specifically for versions 4 and 5, as they have specific requirements in terms of mechanical dimensions and electrical compatibility.
Alright, if you are interested to know these terms for Develop your own hat Or just for curiosity’s sake, all the details are here…
index
PCIe FFC connector wiring: Specifications
The new Raspberry Pi 5 was announced a few months ago and the Raspberry Pi Foundation is moving some interesting things forward for this new SBC, like these new specs revealed. PCIe FFC connector Which you can see in the previous image and in the PDF I attached below.
Some people may have tried and released products such as Mathayom 2 hat for Raspberry Pi 5 since then To be able to connect M.2 storage, network, etc. As we said, even without the pinout and specifications.
Even though the specification was PCIe Gen 2, Jeff Geerling was able to change the configuration to support PCIe Gen 3, as you’ve probably seen online…
But now Raspberry Pi has released official specs to make things easier, with the PCIe FFC connector found on the Raspberry Pi 5 and future models also a 16-pin pitch FFC connector. 0.5 mm. has characteristic a Single lane PCIe 2.0 interface (x1)It’s something we already know. But pin diagrams and instructions for FFC cables (maximum length 50mm with impedance control of 90R +/- 10%) are now also available.
It is a true story. PCIe Generation 2 It may seem somewhat outdated, since on PC we already have PCIe Gen 5, but the truth is that for this Raspberry Pi it is enough due to the speed it provides. For example, we can count on:
- Bandwidth: Per lane transfer rates of up to 5.0 GT/s (giga transfers per second) per lane will be the highest we can achieve with this standard. This provides theoretical speeds of up to 500 MB/s in each direction.
- Lane: As you may know, PCIe 2.0 supports configurations with different number of lanes such as x1, x2, x4, x8, and x16. However, as I mentioned, Raspberry Pi only supports x1.
- Backwards compatibility: PCIe 2.0 is backward compatible with PCIe 1.0. This means that PCIe 1.0 devices can work in PCIe 2.0 slots and vice versa. Even though it has the same transfer speed as the old version.
- Latency: Latency is generally lower compared to PCIe 1.0, which improves data transfer efficiency.
- energy: PCIe 2.0 has improved power management features. This allows for more efficient use of energy when the device is not in use.
It’s important to note that these specs are for PCIe 2.0 in general, and specific implementations may vary between chipset and SBC manufacturers, and as Jeff Geerling has shown, they can enable PCIe Gen 3. Even though it’s not official…
Download PDF of specifications
Raspberry Pi HAT+ Standard: Specifications
Having said that, regarding the new PCIe FFC connector, we have now moved to the HAT and have also officially released the above standard hardware specs for the HAT released for the new SBC Raspberry Pi 5, as it has been released since 2014. onwards, can extend the capabilities of this SBC which is now outdated. And the new specification of this standard is called HAT+ or HAT Plus.
Well then, Requirements They are as follows:
- The HAT+ must be electrically compatible with the Raspberry Pi 5’s STANDBY power state, so the 5V power path will be open but the 3.3V power path will be closed. This is actually true on the Pi 4 and Pi 5, a state that is not present in the model. Older SBCs Additionally, note two details that may be important in this respect:
- Warm Standby: In this case, the Raspberry Pi has all power paths enabled. This is the default mode the system will be placed in when executing “sudo stop” or a soft shutdown operation with the power button on the board. WARM-STANDBY is the default on the Raspberry Pi OS, so both 5V is enabled. and 3.3V, and that’s why I measured the power consumption at 1.7W for the Raspberry Pi 5 when powered off. We can change /boot/config.txt (POWER_OFF_ON_HALT=1, WAKE_ON_GPIO=0) to reduce that value to near zero. Why isn’t it enabled by default? Since some HATs require both 5V and 3.3V, HAT+ only requires 5V, of course we ask that this does not interfere with access to other connectors. and Raspberry Pi 5 active cooler
- Standby: In this case, only the 5V line is supplied with power. Therefore, the power management chip is powered. However, no other power supplies are enabled on the PMIC or the board. This mode can be configured using the “sudo halt” command or with the board’s shutdown button using EEPROM
- Now the physical size of a HAT isn’t as important as it used to be. Dimensional requirements are therefore less defined: HAT+ boards only need to be connected to a 40-way GPIO header (including ID_* pins) and have at least one mechanical mounting hole aligned. with one of the Raspberry Pi’s four mounting holes, the rest are free. for designers
- The contents of the HAT’s EEPROM memory have been simplified to make things easier.
- Now supports new HAT+ specifications or extra classes that can be stacked with additional HAT+ on top. This creates a maximum stack of 2 HATs.
- HAT+ boards, on the other hand, are electronically backward-compatible with older models. Therefore, it can be used with Raspberry Pi SBC boards before the Pi 4 and 5, but only at the electronic level. This may require updated firmware and software. In addition, one reason why the newly released HAT+ specification is still in draft is that the EEPROM utility has not yet been updated for the new, simpler EEPROM parameters.
Download PDF with requirements